CoWoS - chip-on-wafer-on-substrate - is the silicon-interposer packaging that lets an AI accelerator sit beside its high-bandwidth memory with thousands of fine-pitch connections. It is the technology gating the entire AI build-out. Taiwan Semiconductor Manufacturing Co., Ltd. names CoWoS explicitly in a 2021 grant, which makes the claim construction unusually direct.
US11164825B2, "CoWos interposer with selectable/programmable capacitance arrays" (issued 2021-11-02), is classified in H01L 23/62 (protection against electrical overload / capacitance), H01L 23/481 (through-vias), and H01L 24/17 (bump connectors). The novel limitation is embedding selectable or programmable capacitance arrays inside the interposer itself.
“An interposer circuit includes a substrate and a dielectric layer that is disposed on top of the substrate. The interposer circuit includes two or more connection layers including a first connection layer and a second connection layer that are disposed at different depths in the dielectric layer.”— U.S. Patent No. 11,164,825 source
Construe why selectability matters. Decoupling capacitance stabilizes the power supply to fast-switching logic. Putting it in the interposer - close to the die - is better than on the package substrate. Making it selectable lets one interposer design serve multiple products with different decoupling needs. That programmability is the limitation the claim turns on, not capacitors-in-an-interposer generally.
The design-around space is in how the capacitance is realized and selected. A fixed capacitor array in the interposer, or decoupling placed on the die or substrate instead, sits outside a claim that requires a selectable in-interposer array. The value of the claim is exactly the flexibility a fixed scheme lacks.
This is a 'From Claim to Market' kind of patent: CoWoS is not a research curiosity but a high-volume, revenue-generating product, so the claim defends something TSMC actually ships and bills for. That commercial grounding raises the stakes of any infringement read.
For competitive intelligence, the explicit CoWoS naming is a gift - it ties the patent directly to TSMC's flagship advanced-packaging line. Anyone building a competing 2.5D interposer (Intel's EMIB, Samsung's I-Cube) should read this family to understand which interposer-integration tricks TSMC has fenced.