EUV masks are reflective multilayer mirrors, not the transmissive masks of older lithography, and they sit in the beam path absorbing enormous energy. One failure mode is carbon contamination: stray hydrocarbons crack onto the mask surface under EUV exposure, degrading reflectivity and the printed image. Cleaning costs tool time. Taiwan Semiconductor Manufacturing Co., Ltd.'s early-2022 grant claims a mask built to resist it.

US11221554B2, "EUV masks to prevent carbon contamination" (issued 2022-01-11), is classified in G03F 1/24 (lithographic masks for EUV) with G03F 1/22. The claim is on a specific mask structure — layers and materials — engineered to prevent or resist carbon buildup during exposure.

“An extreme ultra-violet (EUV) mask and method for fabricating the same is disclosed.”— U.S. Patent No. 11,221,554 source

Construe the limitation as a structural one, because the claims are quite specific about materials. Independent claim 1 recites a substrate, a multi-layered mirror on it, a metal capping layer, and a multi-layered absorber comprising at least one oxide layer, with the pattern features etched into that absorber. The oxide content of the absorber is the heart of the anti-contamination story: an oxide-faced absorber presents a surface chemistry that resists the carbon cracking that plagues conventional tantalum-based absorbers. Claim 11 generalizes the same idea as an "oxide containing absorber layer," confirming that the oxide absorber — not the goal of clean masks — is what is fenced.

The dependent claims name the actual chemistries, which is what gives the patent its teeth. Claim 3 builds the absorber as a first metal-oxide layer, a metal-nitride layer, and a second metal-oxide layer — an oxide/nitride/oxide sandwich. Claim 4 lists the candidate oxides: tantalum boro-oxide (TaBO), tantalum pentoxide (Ta₂O₅), ruthenium oxide (RuO), ruthenium niobium oxide (RuNbO), or niobium pentoxide (Nb₂O₅). Claim 9 makes the nitride layer tantalum boro-nitride (TaBN) and claim 10 makes the second oxide TaBO. The dimensions are claimed too: claim 5 puts a TaBO oxide layer at roughly 1—2 nanometers, and claim 8 sets the metal capping layer (ruthenium or ruthenium oxide, per claim 7) at roughly 0—4 nanometers. Claims 13—17 enumerate specific three-layer stacks — TaBO/TaBN/TaBO, TaBO/TaBN/Ta₂O₅, TaBO/TaBN/RuO, TaBO/TaBN/RuNbO, TaBO/TaBN/Nb₂O₅.

The fabrication side is claimed in parallel: claim 18 deposits an oxide-containing multi-layered absorber on the mirror, defines features through an expose-bake-develop photoresist process over a hard mask, and etches the absorber to form the device pattern. Claim 2 also specifies a low-thermal-expansion substrate — the standard glass-ceramic mask blank chosen so the pattern does not walk as the mask heats under exposure. Read together, the claims describe not a vague "protective coating" but a defined oxide-terminated absorber stack with named compounds and nanometer thicknesses.

It is worth dwelling on why the oxide termination addresses carbon specifically. Under EUV exposure the high-energy photons and the secondary electrons they liberate crack residual hydrocarbons in the scanner ambient onto whatever surface they strike, growing a carbon film that absorbs EUV and dims the mask. A conventional tantalum-nitride or tantalum-boron-nitride absorber face is comparatively reactive to that carbon chemistry; presenting a metal-oxide face — the TaBO, Ta₂O₅, RuO, RuNbO, or Nb₂O₅ outer layers of claim 4, or the RuO and Ru-niobium-oxide top layers of claims 15 and 16 — changes the surface energetics so carbon adheres and grows more slowly, stretching the interval between the cleaning cycles that consume scanner time. The capping layer beneath (ruthenium or ruthenium oxide at 0—4 nm, claims 7—8) is the same ruthenium chemistry already used to protect the multilayer mirror, so the stack keeps a familiar, robust cap while swapping the absorber's exposed chemistry. That is the engineering logic the dependent claims encode, and it is what separates this from a generic "clean mask" assertion: the protection is a property of the named oxide compounds sitting at the surface, at the claimed thicknesses, not of any process step performed on the mask after the fact. The oxide/nitride/oxide absorber of claim 3, with TaBO as both the bottom and top oxide layers (claims 4 and 10) and TaBN as the nitride core (claim 9), is the canonical embodiment, and claims 13—17 simply swap the top oxide among the listed metal oxides while holding the TaBO/TaBN base — so the family consistently keeps an oxide at the exposed face whatever else changes.

Why does a foundry, not a mask-blank maker, hold this? Because TSMC runs EUV at the highest volume in the world and feels mask-contamination yield loss most acutely. Hoya and other blank suppliers hold their own mask IP; TSMC's grants reflect its operational experience optimizing masks for its own fab, where mask uptime translates directly into wafer throughput on the most expensive lithography tools in the line.

The design-around space is in the absorber chemistry and layer order. A competitor that suppresses carbon by a different mechanism — a non-oxide capping approach, an in-situ hydrogen cleaning protocol, or an absorber outside the claimed TaBO/TaBN/oxide families — reaches the same uptime benefit outside the literal scope. The claim fences TSMC's specific oxide-terminated absorber, down to the named materials and thicknesses, and that specificity is exactly what a competing EUV program would have to read carefully.

For a claim-construction read, this patent illustrates how lithography IP fragments by sub-problem: EUV source power, optics, pellicles, and mask contamination each get their own narrow claims, and within mask contamination this grant stakes out the oxide-terminated absorber route specifically. The two independent claims bound the territory at two widths — claim 1 requiring a multi-layered absorber with at least one oxide layer, claim 11 the broader "oxide containing absorber layer" — so the literal scope turns on whether a competitor's absorber contains a claimed oxide at the surface, not on whether its mask happens to stay clean. Owning the operational fixes like this is how a foundry converts hard-won fab experience, accumulated at the highest EUV volume in the industry, into defensible and specifically-bounded IP.