There are several ways to stack two dies: front-to-front, back-to-back, and front-to-back. Each orientation changes where the vertical connections must run and what the bonding interface looks like. Taiwan Semiconductor Manufacturing Co., Ltd.'s late-2020 grant covers the front-to-back case, where one die's active face meets another die's substrate side.
US10847443B2, "Front-to-back bonding with through-substrate via (TSV)" (issued 2020-11-24), is classified in H01L 23/481 (through-substrate vias), H01L 24/80 and 24/92 (bonding), and H01L 25/0657 (stacked-device assemblies). The claim ties together the bonding orientation and the TSV that must reach through the back-side substrate to connect to the active interconnect of the bonded die.
The limitation that does the work is the relationship between the through-substrate via and the bond interface in this specific orientation. Front-to-back is geometrically distinct from front-to-front because the via has to traverse the full substrate thickness of one die to reach the bond line - a different structure and a different process flow.
Why patent the orientation? Because the orientation dictates thermal behavior, signal length, and where heat-generating logic sits relative to the heat sink. A front-to-back stack is the natural choice when you want one die's back exposed for cooling, which is exactly the constraint in logic-on-logic AI accelerators.
The design-around space sits in the via topology and the bond metallurgy. A competitor stacking front-to-front, or routing the vertical connection through a separate interposer rather than directly through the substrate, avoids the literal claim. But for true direct front-to-back stacking, this family is on the map.
TSMC's pattern across its 2020 bonding grants is to fence each stacking orientation separately - front-to-front, front-to-back, and wafer-on-wafer - building a portfolio that covers the practical permutations a customer might want for SoIC. The claims are individually narrow but collectively comprehensive.