The most overlooked line in the December 2024 BIS advanced-computing rule is not about logic at all. It is a memory control: new ECCN 3A090.c, which captures high bandwidth memory (HBM) having a 'memory bandwidth density' greater than 2 gigabytes per second per square millimeter. With that single technical note, BIS reached into the AI supply chain at a layer most export-control coverage ignores, and it did so with a metric chosen specifically to be hard to game.
Why density, not bandwidth
BIS could have controlled HBM by raw bandwidth. It deliberately did not. The rule's own reasoning is that bandwidth alone would let an exporter sidestep the control by assembling many smaller HBM chips, each individually under a flat bandwidth cap, into a stack that delivers the same aggregate throughput at little extra cost. By controlling 'memory bandwidth density,' defined in the technical note to 3A090.c as the memory bandwidth in gigabytes per second divided by the area of the package or stack in square millimeters, BIS made the control scale with the physical efficiency of the memory rather than with how the parts are counted. HBM is engineered for very high bandwidth in a small footprint; commodity DRAM is not. The density metric therefore lands almost entirely on HBM while leaving general-purpose memory alone. The threshold is set at greater than 2 GB/s per square millimeter, with the package-or-stack area as the denominator and, where a stack sits inside a package, the packaged device's bandwidth used in the calculation.
The logic-die backstop
3A090.c does not work in isolation. The rule pairs it with a restriction in a new paragraph (d): an HBM stack that itself meets 3A090.c must not also push the co-packaged logic die past the TPP or performance-density thresholds of 3A090.a or 3A090.b. The drafting recognizes physical reality. HBM is increasingly co-packaged with a logic die, and that logic die can independently exceed the accelerator thresholds. So the rule controls the memory under 3A090.c and separately preserves the logic controls under 3A090.a and .b, ensuring that an integrated package cannot launder a controlled accelerator through the 'it's just memory' framing. For classification, that means a single advanced package can trip multiple paragraphs of 3A090 at once, and each has to be evaluated on its own parameters.
License Exception HBM and the 3.3 line
The rule does not flatly prohibit all qualifying HBM. It creates License Exception HBM in a new section of the regulations, but it draws a second, tighter numeric line inside it. License Exception HBM is available only when the 3A090.c item has a memory bandwidth density less than 3.3 GB/s per square millimeter. HBM at or above 3.3 GB/s per square millimeter is treated as of greater concern and falls outside the exception. So there are effectively two density figures to track: the 2 GB/s per square millimeter floor that pulls HBM into 3A090.c in the first place, and the 3.3 GB/s per square millimeter ceiling above which even the license exception disappears. A part between those two figures can move under the exception subject to conditions; a part above 3.3 cannot.
This two-threshold design is unusual and worth dwelling on. It tells you BIS wanted to control the broad category of advanced HBM while still permitting some flow of the lower-density end of that category under defined conditions, and it picked density as the dial because density tracks generational HBM progress. As stack heights and packaging efficiency climb, bandwidth density climbs with them, so a control written in density terms automatically tightens on each new HBM generation without BIS having to re-amend the ECCN. The number does the work that a node label could not.
What it means for the AI build-out
HBM is the gating component of large-scale AI training and inference; accelerators are bandwidth-starved without it. By controlling the memory layer at 2 GB/s per square millimeter and capping the license exception at 3.3, BIS placed a control point upstream of the accelerator itself. An entity that could somehow obtain controlled logic but not the HBM to feed it gains far less usable compute. The 3A090.c control, the paragraph (d) logic-die backstop, and the dual 2.0 / 3.3 GB/s-per-square-millimeter thresholds inside License Exception HBM together form one of the more technically precise pieces of the entire advanced-computing control regime, and they are the part most likely to be missed by anyone who reads only the logic-chip headlines.
How the HBM control reaches finished products
A natural question is whether controlling bare HBM accomplishes anything once the memory is co-packaged or soldered into a finished accelerator. BIS addressed this directly. The rule notes that once HBM is incorporated into an IC or a higher-level commodity such as a computer or electronic assembly, the controls under ECCN 3A090.a, 3A090.b, 4A090.a or .b, or the respective .z paragraphs may apply to the commodities containing the HBM. In other words, the memory does not have to be the controlled item in the finished good for the finished good to be controlled; the surrounding logic or assembly entries pick it up. The 3A090.c entry is aimed squarely at HBM as a component moving through the production process, while the broader logic and assembly entries handle the same memory once it is integrated. This division of labor is why BIS could write a narrow, density-based component control without creating a gap for integrated products.
The rule's own framing of national-security concern is instructive about why memory earned its own ECCN at all. BIS describes advanced memory as key because of its role in AI training and inference 'at scale,' the regime that supercomputing and the largest models depend on. Memory capacity and bandwidth, not just logic throughput, set the ceiling on how large a model a cluster can train and how fast it can serve. By writing the control in density terms and pinning the license-exception availability to a second density figure, BIS built a memory control that scales with each HBM generation automatically: as stacks grow taller and packaging grows denser, parts cross the 2.0 floor and then the 3.3 ceiling without further rulemaking. The metric is the mechanism, and it is calibrated to the physics of how HBM actually improves.