Processing-using-DRAM, or PuD, is a computation paradigm that tries to do arithmetic inside the memory array itself, rather than shuttling operands back and forth to a separate processor. The technique works by activating multiple DRAM rows at once — simultaneous multiple-row activation, or SiMRA — so that each DRAM column behaves as a small computation engine. A preprint posted to arXiv on June 17, 2026 by Daichi Tokuda and a team including Onur Mutlu reports that this idealized picture breaks down on real silicon, and names the failure mode PuDGhost.

The motivation the authors give is rooted in scaling physics. As the abstract states, “DRAM density scaling may hinder PuD’s benefits: denser cell arrays bring rows and columns closer, making regular DRAM operations susceptible to noise and interference from neighboring cells.” The same proximity that lets manufacturers pack more bits per die also lets charge and coupling effects leak between structures that are supposed to be electrically independent. The paper observes that prior work had not asked whether interference from rows or columns that were never meant to participate in a computation could corrupt the result.

"PuDGhost violates the ideal picture that each column's computation depends solely on its own operand data, threatening future PuD systems."— arXiv:2606.19119 (Tokuda et al.), source

The phenomenon the authors describe has two distinct sources. According to the paper, a PuD operation in a given column can produce erroneous results due to interference from, first, “data in non-activated DRAM rows” and, second, “data in other columns that compute concurrently under the same SiMRA operation.” Both sources break the assumption that a column’s output is a function only of its own operands. The first means that bits sitting idle in rows the operation never selected can still tilt the answer; the second means that two columns computing side by side under one SiMRA command can interfere with each other’s results.

What the measurements show

The study is empirical and the scale is specific. The authors present what they describe as “the first extensive characterization of PuDGhost using 96 real DDR4 DRAM chips from 12 modules,” quantifying both interference sources under varying conditions. From that characterization they report 15 new empirical observations, and they highlight two headline results. Data in adjacent non-activated rows affects SiMRA outputs by up to 10 percent for random inputs, and data in concurrently computing columns affects SiMRA outputs by up to 48 percent for random inputs. The column-to-column figure is the larger of the two by a wide margin, indicating that concurrent computation, not merely stored data in idle rows, is the dominant disturbance the study found.

The “for random inputs” qualifier is part of the reported result and matters for interpretation. It frames the figures as the effect measured under random operand data rather than a single adversarial worst case, and the “up to” phrasing indicates these are maxima observed across the tested conditions rather than uniform averages. The reliance on 96 physical DDR4 chips across 12 modules is the basis the authors give for treating the effect as a property of real devices rather than a simulation artifact.

Proposed countermeasures

The paper does not stop at characterization. Guided by the findings, the authors propose countermeasures across multiple layers of the PuD computing stack and evaluate two on real DDR4 chips. The first is “robust column screening that reduces the risk of using unreliable columns in the presence of PuDGhost” — in effect, identifying and avoiding columns whose computations are most disturbed. The second is “a compute row layout that mitigates PuDGhost via dedicated rows between compute rows,” which inserts spacer rows to reduce the coupling the study measured. The authors state that these solutions improve PuD computation accuracy and provide a foundation for more robust future PuD systems.

The distinction between the two mitigations is instructive about how the problem is being attacked. Column screening is a selection strategy: it accepts that some columns are unreliable under PuDGhost conditions and routes computation away from them, which costs usable capacity but requires no change to the array layout. The compute-row layout is a structural strategy: by reserving dedicated rows between the rows used for computation, it physically increases the distance that coupling effects must bridge, trading array density for accuracy. Both are evaluated on the same real DDR4 chips the study used for characterization, which keeps the mitigation results on the same empirical footing as the disturbance measurements.

The motivation the paper opens with also connects the result to a forward-looking concern rather than only a present one. Because the interference is tied to how close rows and columns sit, and because density scaling brings those structures closer, the disturbance the authors measured on current DDR4 is the kind of effect that a denser future generation would be expected to make worse, not better. That is the sense in which the paper frames PuDGhost as threatening future PuD systems specifically: the paradigm’s appeal grows as memory density grows, but so does the physical mechanism that the study documents. The countermeasures are positioned as a foundation for keeping in-DRAM computation reliable as that tension intensifies.

For anyone tracking near-memory and in-memory compute as a response to the data-movement bottleneck, the contribution here is a reliability characterization on commodity DRAM rather than a new accelerator. The framing throughout is conditional: the paper says density scaling “may hinder” PuD’s benefits and presents the corruption figures as measured maxima under specified conditions, while positioning the column-screening and row-layout techniques as evaluated mitigations rather than settled fixes. The record documents the interference mechanism, the 96-chip measurement basis, the two quantified disturbance sources, and the proposed countermeasures, leaving the question of how PuDGhost behaves on future, denser DRAM generations to the systems the authors say their work is meant to inform.